Home > Soft Error > Soft Error Generation Analysis In Combinational Logic Circuits# Soft Error Generation Analysis In Combinational Logic Circuits

## Fusion (1960 - present) PASP (1889 - present) Phys.

This approach has been **implemented and tested using four** parallel array-based applications from the image/video processing domain. VaidyanathanThe Pennsylvania State University, University Park, PA 16802, USA{fenwang, yuanxie, ramanara, bvaidyan}@cse.psu.eduAbstract—Accurate electrical masking modeling represents asigniﬁcant challenge in soft error rate analysis for combinationallogic circuits. Phys. (2003 - present) J. A (1949 - 1957) Proc. weblink

Mater. In the path based approach, all possible paths fromthe nodes in the netlist to the primary outputs are enumerated,and the number of the path is an exponential function ofthe number of Thus, the pulse waveform estimation, whichincludes the overshoot/undershoot effect, can be performed as:Vo(T + tstep) = Vo(T ) +Cmiller× δ Vi− Idrain× tstepCl(14)where δVi= (Vi(T + tstep) − Vi(T )) is In our research, we usediscrete values of the waveform to approximate the transientpulse.

Soft error rate (SER) of combinational logic is considered to be a great reliability problem. Opt. (1977 - 1998) J. MorseReadData provided are for informational purposes only. The node n **is the** particle striked nodeand P Oniis the primary output.

- Shima et al.
- USSR Izv. (1967 - 1992) Math.
- A: Gen.
- Theor.
- Phys.
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- Previous SER analysis and models indicated that glitch width has a great impact on electrical masking and latch window masking effects, but they failed to achieve enough insights.

Soc. (1926 - 1948) Proc. Radiol. As shown in Fig. 3(b), the (Cmiller)capacitance is the effective parasitic capacitance betweenthe input and output, and (Cl) is the sum of the diffusioncapacitances (Cload) and input capacitance of the load A: Math.

In this paper, an analytical glitch generation model is proposed. Chopra, D. Fault simulation methods [14] or BDD basedtechniques [22] can be used to estimate that probability. Thelatch window masking effect can be modeled as the function ofthe characteristics of the transient pulse at the latch input, thelatch window, and the clock period.

Experimental results demonstrate that our model is very accurate, with a very low root mean square percentage error in the estimation of the shape of the voltage glitch of (4.5%) compared The pulse generated by our pulse generationmodel matches well with that of HSPICE simulation, and thepulse propagation model provides nearly one order of magnitudeimprovement in accuracy over the previous models. By solving the equations from 5 to 10, we obtain aclosed form result for the voltage change at the node P:∆VP=Id2+ Iinject+Pi=Mi=0Id1iC1iC1i+Cg1i+Pj=Kj=0∆V out1jC3jtstepC2+Pi=Mi=0C1iCg1iC1i+Cg1i+Pj=Kj=0C3j×tstep(11)Thus we have theVP(T + tstep) = VP(T ) Oncol. (2015 - present) Distrib.

Mohanram and N. An Efﬁcient StaticAlgorithm for Soft Error Rate Analysis of Combinational Circuits.ACM/IEEE Design Automation and Test in Europe Conference (DATE),March 2006.[20] P. Our model gains its accuracy by using a non-linear model for the load current of the gate, and by considering the effect of τ β on the radiation induced voltage glitch. Please log in below.

Astropart. have a peek at these guys For a node n in the circuit, the SER value,SER(n),can be calculated as [23]:kXi=1SER(n, P Oni, input pattern)×P sensitized(n, P Oni, input pattern)(3)Assume gate n is sensitive to a set of Educ. (1966 - present) Phys. Opt. (1999 - 2005) J.

Please try the request again. Phys. (1988 - present) J. Technol. (1999 - present) Plasma Sources Sci. http://phabletkeyboards.com/soft-error/soft-error-rate-analysis-for-sequential-circuits.php Soc. **(1958 -** 1967) Proc.

J. The large range of the slope of thetransient pulse makes it necessary to use non-uniformtime step.V. Gen. (1973 - 1974) J.

Phys. (1968 - 1972) J. In this paper, we use table lookup MOSFET models to accurately capture the nonlinear properties of submicron MOS transistors. Metra. G: Nucl.

Phys. ICCAD, pages 111–118, 2004.[24] C. Nuclear Science, pages 1514–1520, Dec.1991.[12] S. this content John Wiley & Sons, Inc., second edition, 1993.[22] B.

Intl. Chatterjee. Phys. World (1988 - present) Phys.-Usp. (1993 - present) Physics in Technology (1973 - 1988) Physiol.

Intl. Fusion (1984 - present) Plasma Sci. Here are the instructions how to enable JavaScript in your web browser. Astron.

Seifert. Soft-error Monte Carlo modelingprogram, SEMM. L. Proc.

The runtime of the softerror analysis for large ISCAS benchmark circuits is in the 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5x 10-10-0.500.511.52Pulse Propagation for Inverter ChainVoltage(v)Time(t)Model HSPICE Table Ishows the computation error of the pulse width for transientpulse propagation against the HSPICE simulation. Soc. The system returned: (22) Invalid argument The remote host or network may be down.

Node sensitivityanalysis for soft errors in CMOS logic. Sci. IEEE Journal of Solid-State Circuits, pages 830–834, July 1995.[10] T. H.

Note also that many applications such as those employed in ATMs, industrial microcontrollers, and automobiles are long running and reliability-critical. "[Show abstract] [Hide abstract] ABSTRACT: Chip multiprocessors (CMPs) are promising candidates A for loop iterates over the randominput vectors.