registers). A computer readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the Generated Fri, 28 Oct 2016 01:02:55 GMT by s_mf18 (squid/3.5.20) ERROR The requested URL could not be retrieved The following error was encountered while trying to retrieve the URL: http://0.0.0.10/ Connection IBM’s S/390 G5 microprocessor design[J]. http://phabletkeyboards.com/soft-error/soft-error-ecc.php
Juni 20005. However, the original pattern of ones and zeros cannot be reconstructed purely from this knowledge alone. Register now for a free account in order to: Sign in to various IEEE sites with a single account Manage your membership Get member discounts Personalize your experience Manage your profile The system further includes error recovery circuitry to insert an error recovery instruction into the arithmetic pipeline in response to detecting the corrupted data. http://ieeexplore.ieee.org/iel5/4708846/4708847/04708869.pdf
In exemplary embodiments, the arithmetic pipeline may be implemented as a fixed-point pipeline (to execute a fixed-point arithmetic instruction) or a floating-point pipeline (to execute a floating-point arithmetic instruction). This may lead to a higher speed and more efficient error correction when compared to contemporary error correction processes. J. It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures.
When the parity error is correctable, the arithmetic pipeline 110 selects whichever operand is correct, and writes the result back to a target address, in both copies of the register file The control unit 104 then resumes normal operation, by re-issuing the original instruction, which caused the detection of the soft error. SWIFT: Software implemented fault tolerance[C]// Proceedings of the International Symposium on Code Generation and Optimization. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the
An exemplary sequence of events for detecting and correcting a parity error is depicted in FIG. 2. The inserted error recovery instruction replaces the corrupted data in the first register file with a copy of the data from a second register file that mirrors the first register file. For a better understanding of the invention with the advantages and features, refer to the description and to the drawings. useful reference Error detection refers to the act of ascertaining that a disturbing event has occurred, while error correction refers to the process of reproducing the original, uncorrupted data pattern.
The magnetic field is most commonly defined in terms of the Lorentz force it exerts on moving electric charges. Copyright © 2016 ACM, Inc. Exemplary embodiments are described in terms of a single instruction/multiple data (SIMD) processor, but can be applied to the generic case of any processor pipeline with duplicated register files. Technical effects and benefits include the ability to perform error recovery in a more efficient and less obtrusive manner than conventional ECC based mechanisms.
Compiler-guided register reliability improvement against soft errors[C]//Proceedings of the 5th ACM International Conference on Embedded Software. http://www.google.ch/patents/US8560924 Piscataway N J: IEEE Press, 2001: 3–14.Google ScholarWu Y, Larus J R. In an exemplary embodiment, the error recovery circuitry 116, error detection circuitry 114 and address capture circuitry 112 are located in the arithmetic unit 102. Okt. 2013Eingetragen5.
MiBench: A free, commercially representative embedded benchmark suite[C]// IEEE International Workshop on Workload Characterization, 2001. have a peek at these guys März 20046. In an exemplary embodiment, state machines and recovery logic hardware in the processor handle this entire recovery operation, including the detection of the parity error, the capturing of the offending address Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, 2010, 29(7): 1018–1027.CrossRefGoogle ScholarJason A B, Gupta S, Feng S G, et al.
In the event of a soft error, as long as one does not occur at the same address in both copies of the register file, which is highly unlikely, the normal The control unit 104 then signals to the error recovery circuitry 116 to begin the error recovery sequence. The ACM Guide to Computing Literature All Tags Export Formats Save to Binder Mein KontoSucheMapsYouTubePlayNewsGmailDriveKalenderGoogle+ÜbersetzerFotosMehrShoppingDocsBooksBloggerKontakteHangoutsNoch mehr von GoogleAnmeldenAusgeblendete Felder PatenteRegister file soft error recovery including a system that includes check over here Solutions for Soft Errors in System on Chip Designs[EB/OL].[2014-04-15].http://www.design-reuse.com/articles/6930/solutions-for-soft-errors-in-system-on-chip-designs.html.Google ScholarLee J, Shrivastava A.
New York: ACM Press, 1994: 1–11.Google ScholarCopyright information© Wuhan University and Springer-Verlag Berlin Heidelberg 2014Authors and AffiliationsPeng Wen1Guochang Yan2Xuhui Li2Email authorShi Ying21.School of Information ManagementWuhan UniveristyWuhanHubei, China2.State Key Laboratory of Software EngineeringWuhan UniversityWuhanHubei, China About this article Another exemplary embodiment is a computer implemented method for performing soft error recovery. Your cache administrator is webmaster.
The computer program product includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. morefromWikipedia Soft error In electronics and computing, a soft error is an error in a signal or datum which is wrong. New York: ACM Press, 2005: 118–124.Google ScholarJason A B, Gupta S, Feng S G, et al. An error recovery instruction is inserted into an arithmetic pipeline in response to detecting the corrupted data.
In an exemplary embodiment, the arithmetic unit 102 loads the data in register file 106 and register file 108, and the arithmetic pipeline 110 processes the instructions and performs arithmetic on The system returned: (22) Invalid argument The remote host or network may be down. The system also includes an arithmetic pipeline for receiving data read from the first register file, and error detection circuitry to detect whether the data read from the first register file http://phabletkeyboards.com/soft-error/soft-error-detection.php The Government has certain rights to this invention.
In an exemplary embodiment, the soft error is detected using a parity bit that detects a parity error.